четверг, 3 июля 2025 г.

sass instructions properties

I've already described so called predicates. Unfortunately they have only size of operands. Unlike predicates properties also have types:

 IDEST_OPERAND_MAP = (1<<INDEX(Rd));
 IDEST_OPERAND_TYPE = (1<<IOPERAND_TYPE_GENERIC);
 IDEST2_OPERAND_MAP = (1<<IOPERAND_MAP_NON_EXISTENT_OPERAND);
 IDEST2_OPERAND_TYPE = (1<<IOPERAND_TYPE_NON_EXISTENT_OPERAND);
 ISRC_B_OPERAND_MAP = (1<<INDEX(Rb));
 ISRC_B_OPERAND_TYPE = (1<<IOPERAND_TYPE_GENERIC);
 ISRC_C_OPERAND_MAP = (1<<INDEX(Rc));
 ISRC_C_OPERAND_TYPE = (1<<IOPERAND_TYPE_TEX);
 ISRC_A_OPERAND_MAP = (1<<INDEX(Ra));
 ISRC_A_OPERAND_TYPE = (1<<IOPERAND_TYPE_SURFACE_COORDINATES); 

This sample for suatom instruction. Here destination has single operand so DEST2 marked with NON_EXISTENT_OPERAND. Unfortunately properties has couple of serious drawbacks:

1) they were cut out by paranoid NVidia somewhere in version 12.7-12.8, so I ripped MDs with properties up to sm90 - sm100, sm101 & sm120 don't have them. I also tried to re-apply properties from sm90 to 3 remained - but this is very unreliable

2) they are not complete. Lets see couple of samples

isetp (Integer Compare And Set Predicate) predicates look like:

Predicates:
 ISRC_B_SIZE: 32
 ISRC_A_SIZE: 32
 ISRC_A type INTEGER: Ra
 ISRC_B type INTEGER: Rb

despite the fact that this instruction changes value of Pu predicate:
@Pg.D(7) ISETP .E:icmp .E:fmt.D(1) .E:ex.D(0) E:Pu E:Ra .E:reuse_src_a.D(0) E:Rb .E:reuse_src_b.D(0) ,Pr.D(7) req_bit_set:BITSET E:usched_info E:batch_t.D(0)

tld has 9 operands (or even 14 if we count tail starting at req_bit_set):

@Pg.D(7) TLD .E:f16rm.D(0) .E:lodlc .E:aoffi.D(0) .E:cop.D(1) .E:ms.D(0) .E:cl.D(0) .E:nodep.D(0) E:Pu.D(7) E:Rd2 E:Rd E:Ra E:Rb.D(255) ,bank5:UImm ,tsPtrIdx:UImm E:paramA ,wmsk:UImm(15) req_bit_set:BITSET src_rel_sb:UImm(7) dst_wr_sb:UImm(7) E:usched_info E:batch_t.D(0)

However we can see properties for 4 operands only:

Predicates:
 VQ: VQ_TEX (3)
 IDEST2_SIZE: 64
 ISRC_B_SIZE: 0
 ISRC_A_SIZE: 32
 IDEST_SIZE: 64
 IDEST2 type FLOAT: Rd2
 ISRC_B type TEX: Rb
 ISRC_A type TEX: Ra
 IDEST type FLOAT: Rd 

Btw IDA Pro has only 8 ops in insn_t

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